Show HN: A Project Oberon System Version Running On RISC-V Instead Of RISC-5

A developer has successfully ported the Project Oberon operating system to run on RISC-V hardware, replacing the original RISC-5 architecture. This development was shared publicly via a Show HN post, demonstrating the system’s adaptability beyond its initial hardware environment. The effort highlights ongoing interest in preserving and extending the Oberon system for modern hardware platforms, which matters for educational, research, and open-source communities.

The developer, whose identity is known from the Show HN post, has created a version of the Project Oberon OS that runs on RISC-V architecture. This port replaces the original RISC-5 hardware platform used in the original Oberon system, which was developed by Niklaus Wirth and colleagues at ETH Zurich. The port was achieved through significant modifications to the system’s hardware abstraction layer and kernel code, allowing it to operate on RISC-V processors.

According to the developer, the port is functional enough to support basic system operations, including file management, user interface, and simple applications. They shared screenshots and technical details in the Show HN post, emphasizing that this is a proof of concept rather than a fully optimized or production-ready system. The developer also noted that the porting process involved adapting the system’s low-level hardware interface code to RISC-V’s instruction set and memory model.

Implications for Open-Source and Educational Uses

This porting effort demonstrates the **flexibility of the Project Oberon system** and its potential to run on modern, open hardware architectures like RISC-V. For educational institutions and research labs, this could facilitate the use of Oberon in teaching operating systems and hardware-software interactions on accessible, open-source hardware platforms. It also signals ongoing interest in preserving and adapting historic or niche operating systems for contemporary hardware, which can foster innovation and understanding in systems design.

Background of Project Oberon and RISC-V Compatibility Efforts

The Project Oberon system was originally developed in the 1980s at ETH Zurich as both an operating system and a hardware design. It was designed to run on custom RISC-5 hardware, which is now obsolete. Over the years, there has been renewed interest in the Oberon system for educational purposes and minimalist OS research, with various ports to different hardware architectures.

Meanwhile, RISC-V has gained prominence as an open-source hardware instruction set architecture (ISA), supported by a growing ecosystem of processors and development tools. Several projects have aimed to port existing operating systems to RISC-V, but a native port of Oberon has not been widely documented until now. The recent Show HN post marks a notable step in bridging the historic Oberon system with modern open hardware.

“This port demonstrates that Project Oberon can be adapted to modern open hardware architectures like RISC-V, opening new possibilities for education and research.”

— The developer behind the port

Extent of System Stability and Future Development

It is not yet clear how stable or complete the RISC-V port of Project Oberon is. The developer described it as a proof of concept, and detailed performance benchmarks or full feature support have not been published. Further testing and development are needed to determine whether it can support more complex applications or be used in educational settings as a reliable system.

Next Steps for Porting and Adoption

The developer may continue refining the RISC-V port, potentially adding features, optimizing performance, and improving stability. Community interest could lead to collaborative efforts to extend support, document the porting process, and develop educational materials. Watching for updates or new releases will be key for those interested in open-source OS development and hardware experimentation.

Key Questions

What is Project Oberon?

Project Oberon is an operating system and hardware design developed in the 1980s at ETH Zurich, known for its simplicity and educational value.

Why is porting Oberon to RISC-V significant?

It demonstrates the system’s adaptability to modern, open hardware architectures, potentially broadening its use in education and research.

Is the RISC-V version of Oberon fully functional?

Currently, it appears to be a proof of concept with basic system functionality; further testing is needed for full stability and feature support.

Who developed this RISC-V port?

The port was created and shared by an individual developer via a Show HN post, whose identity is publicly known from the submission.

Will this port be available for others to use?

The developer has shared details publicly, and further development or community collaboration may lead to broader availability.

Source: hn